Publications


Conference Papers

  • [AAAI’20] A. Ren, T. Zhang, Y. Wang, S. Lin, P. Dong, Y.K. Chen, Y. Xie, and Y. Wang, “DARB: A Density-Adaptive Regular-Block Pruning for Deep Neural Networks,” in Proc. of the 34th AAAI Conference on Artificial Intelligence (AAAI), 2020. Acceptance rate: 20.6%
  • [ASPLOS’19] A. Ren, T. Zhang, S. Ye, W. Xu, X. Qian, X. Lin, and Y. Wang, “ADMM-NN: An Algorithm-Hardware Co-Design Framework of DNNs Using Alternating Direction Methods of Multipliers,” in Proc. of the 24th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2019. Acceptance rate: 21.1%
  • [ISCA’19] R. Cai, A. Ren, O. Chen, N. Liu, C. Ding, X. Qian, J. Han, W. Luo, N. Yoshikawa, and Y. Wang, “A stochastic-computing based deep learning framework using adiabatic quantum-flux-parametron superconducting technology,” in Proc. of the 46th International Symposium on Computer Architecture (ISCA), 2019. Acceptance rate: 16.9%
  • [ISSCC’19] J. Yue, R. Liu, W. Sun, Z. Yuan, Z. Wang, Y. Tu, Y. Chen, A. Ren, Y. Wang, M. Chang, X. Li, H. Yang, and Y. Liu, “7.5 A 65nm 0.39-to-140.3 TOPS/W 1-to-12b Unified Neural Network Processor Using Block-Circulant-Enabled Transpose-Domain Acceleration with 8.1× Higher TOPS/mm2 and 6T HBST-TRAM-Based 2D Data-Reuse Architecture,” in Proc. of IEEE International Solid-State Circuits Conference (ISSCC), 2019.
  • [GLVLSI’19] R. Cai, O. Chen, A. Ren, N. Liu, C. Ding, N. Yoshikawa, and Y. Wang, “A Majority Logic Synthesis Framework for Adiabatic Quantum-Flux-Parametron Superconducting Circuits,” in Proc. of the 29th ACM Great Lakes Symposium on VLSI (GLVLSI), 2019. Acceptance Rate: 29%
  • [ISVLSI’19] R. Cai, X. Ma, O. Chen, A. Ren, N. Liu, N. Yoshikawa, and Y. Wang, “IDE Development, Logic Synthesis and Buffer/Splitter Insertion Framework for Adiabatic Quantum-Flux-Parametron Superconducting Circuits,” in Proc. of IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2019.
  • [ASPLOS’18, co-first author] R. Cai, A. Ren, N. Liu, C. Ding, L. Wang, X., M. Pedram, and Y. Wang, “VIBNN: Hardware acceleration of Bayesian neural networks,” in Proc. of the 23th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2018. Acceptance Rate: 17.6%
  • [GLVLSI’18, co-first author] C. Ding, A. Ren, G. Yuan, X. Ma, J. Li, N. Liu, B. Yuan, and Y. Wang, “Structured weight matrices-based hardware accelerators in deep neural networks: FPGAs and ASICs,” in Proc. of the 28th ACM Great Lakes Symposium on VLSI (GLVLSI), 2018. Acceptance Rate: 24%
  • [ISVLSI’18] Z. Li, J. Li, A. Ren, C. Ding, J. Draper, Q. Qiu, B. Yuan, and Y. Wang, “Towards budgetdriven hardware optimization for deep convolutional neural networks using stochastic computing,” in Proc. of IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2018.
  • [ISLQED’18] X. Ma, Y. Zhang, G. Yuan, A. Ren, Z. Li, J. Han, J. Hu, and Y. Wang, “An area and energy efficient design of domain-wall memory-based deep convolutional neural networks using stochastic computing,” in Proc. of 19th International Symposium on Quality Electronic Design (ISLQED), 2018. Best paper nomination
  • [ASPLOS’17] A. Ren, J. Li, Z. Li, C. Ding, X. Qian, Q. Qiu, B. Yuan, and Y. Wang, “SC-DCNN: Highly-Scalable Deep Convolutional Neural Network using Stochastic Computing,” in Proc. of the 22th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2017. Acceptance Rate: 17.4%
  • [ICCAD’17] H. Li, T. Wei, A. Ren, Q. Zhu, and Y. Wang, “Deep reinforcement learning: Framework, applications, and embedded implementations,” in Proc. of the 36th International Conference on ComputerAided Design (ICCAD), 2017. Invited Paper, Acceptance Rate: 24%
  • [ICCD’17] R. Cai, A. Ren, L. Wang, M. Pedram, and Y. Wang, “Hardware acceleration of bayesian neural networks using RAM based linear feedback gaussian random number generators,” in Proc. of the 35th IEEE International Conference on Computer Design (ICCD), 2017. Acceptance Rate: 29%
  • [MWSCAS’17] G. Yuan, C. Ding, R. Cai, X. Ma, Z. Zhao, A. Ren, B. Yuan, and Y. Wang, “Memristor crossbar-based ultra-efficient next-generation baseband processors,” in Proc. of the 60th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), 2017.
  • [IJCNN’17] J. Li, Z. Yuan, Z. Li, C. Ding, A. Ren, Q. Qiu, J. Draper, and Y. Wang, “Hardware-driven nonlinear activation for stochastic computing based deep convolutional neural networks,” in Proc. of the International Joint Conference on Neural Networks (IJCNN), 2017.
  • [GLVLSI’17] Z. Yuan, J. Li, Z. Li, C. Ding, A. Ren, B. Yuan, Q. Qiu, J. Draper, and Y. Wang, “Softmax regression design for stochastic computing based deep convolutional neural networks,” in Proc. of the 27th ACM Great Lakes Symposium on VLSI (GLVLSI), 2017. Acceptance Rate: 24.4%
  • [DATE’17] Z. Li, A. Ren, J. Li, Q. Qiu, B. Yuan, J. Draper, and Y. Wang, “Structural design optimization for deep convolutional neural networks using stochastic computing,” in Proc. of the Conference on Design, Automation and Test in Europe (DATE), 2017. Acceptance Rate: 24%
  • [ICASSP’17] S. Liu, A. Ren, Y. Wang, P. K. Varshney, “Ultra-fast robust compressive sensing based on memristor crossbars,” in Proc. of 42nd IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), 2017. Best Paper Award, Best Student Presentation Award (Rank top 3 in more than 2,000 submissions)
  • [ASP-DAC’17] A. Ren, S. Liu, R. Cai, W. Wen, P. K. Varshney, and Y. Wang, “Algorithm-hardware co-optimization of the memristor-based framework for solving SOCP and homogeneous QCQP problems,” in Proc. of 22nd Asia and South Pacific Design Automation Conference (ASP-DAC), 2017. Acceptance Rate: 31%
  • [ASP-DAC’17] J. Li, A. Ren, Z. Li, C. Ding, B. Yuan, Q. Qiu, and Y. Wang, “Towards acceleration of deep convolutional neural networks using stochastic computing,” in Proc. of 22nd Asia and South Pacific Design Automation Conference (ASP-DAC), 2017. Acceptance Rate: 31%
  • [ICRC’16] A. Ren, Z. Li, B. Yuan, Q. Qiu, and Y. Wang, Designing reconfigurable large-scale deep learning systems using stochastic computing,” in Proc. of IEEE International Conference on Rebooting Computing (ICRC), 2016.
  • [ICCD’16, co-first author] Zhe Li, A. Ren, J. Li, Q. Qiu, Y. Wang, and B. Yuan, “DSCNN: Hardwareoriented optimization for Stochastic Computing based Deep Convolutional Neural Networks,” in Proc. of the 34th IEEE International Conference on Computer Design (ICCD), 2016. Acceptance Rate: 28.8%
  • [SOCC’16] R. Cai, A. Ren, Y. Wang, S. Soundarajan, Q. Qiu, B. Yuan, and P. Bogdan, “A lowcomputation-complexity, energy-efficient, and high-performance linear program solver using memristor crossbars,” in Proc. of the 29th IEEE International System-on-Chip Conference (SOCC), 2016.
  • [SOCC’16] A. Ren, B. Yuan, and Y. Wang, “Design of high-speed low-power polar BP decoder using emerging technologies,” in Proc. of the 29th IEEE International System-on-Chip Conference (SOCC), 2016.

Journal Papers

  • [Access’20] B. Kakillioglu, A. Ren, S. Velipasalar, Y. Wang, “3D Capsule Networks for Object Classification with Weight Pruning,” in IEEE Access, 2020. Impact Factor: 4.1
  • [2D Mater.’19, co-first author] Y. Qiang, A. Ren, X. Zhang, P. Patel, X.n Han, K. Seo, Z. Shi, Y. Wang, and H. Fang, “Design of Atomically-Thin-Body Field-Effect Sensors and Pattern Recognition Neural Networks for Ultra-Sensitive and Intelligent Trace Explosive Detection,” in 2D Materials, 2019. Impact Factor: 7.3
  • [Nano Commun. Netw.’18] R. Cai, A. Ren, S. Soundarajan, and Y. Wang, “A low-computation complexity, energy-efficient, and high-performance linear program solver based on “dual interior point method using memristor crossbars,” in Nano Communication Networks, 2018.
  • [TCAD’18] Z. Li, J. Li, A. Ren, R. Cai, C. Ding, X. Qian, J. Draper, B. Yuan, J. Tang, Q. Qiu, and Y. Wang, “HEIF: Highly Efficient Stochastic Computing based Inference Framework for Deep Neural Networks,” in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2018.
  • [INTEGRATION’17] J. Li, Z. Yuan, Z. Li, A. Ren, C. Ding, J. Draper, S. Nazarian, Q. Qiu, B. Yuan, and Y. Wang, “Normalization and dropout for stochastic computing-based deep convolutional neural networks,” in Integration, the VLSI Journal, 2017.